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Description: DES 加密算法的VHDL和VERILOG 源程序及其TESTBENCH。
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Size: 30494 |
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Description: 3重DES(3DES)加密算法的问答及其VHDL实现。
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Size: 140190 |
Author: 张开文 |
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Description: 这是一个用VHDL语言实现了DES加密功能的程序,由于DES加密的模式,解密时需把密要倒置
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Size: 27707 |
Author: liyajun |
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Description: RS232 verilog design
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Size: 114688 |
Author: liuKe |
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Description: 华大机顶盒源码,包括所有源代码,还有详细的说明文档,不可多得实际工程,现已流片生产-Mandarin source set-top boxes, including all source code, as well as detailed documentation, rare practical engineering, is now streaming film production
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Size: 418816 |
Author: 聂样 |
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Description: 华为内部资料,关于FPGA设计的详细过程介绍,很不错的。本文档从FPGA器件结构出发以速度路径延时大小和面积资源占用率为主题描述在FPGA设计过程中应当注意的问题和可以采用的设计技巧。-Huawei internal information, with regard to detailed FPGA design process of introduction, it is good. This document from the FPGA device structure in order to speed the path delay and area the size of the theme of the occupancy rate of resource description in the FPGA design process should pay attention to the problems and design techniques can be used.
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Size: 1705984 |
Author: 高超 |
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Description: The best 3des code. The best area
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Size: 2048 |
Author: Guilherme |
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Description: AES VERILOG CODE 128 192 32DES比較-AES VERILOG CODE 128 192 32DES Comparison
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Size: 386048 |
Author: 蕭嵎之 |
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Description: 从万方数据库中下的介绍des加密以及解密的两片文章,是用FPGA实现的,pdf格式.希望对理解des加密以及解密的原理有所帮助。
-From the description of the database under the des encryption and decryption of the two articles is the use of FPGA implementation, pdf format. Hope to understand the principles of des encryption and decryption help.
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Size: 277504 |
Author: chengpan |
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Description: 3DES的VHDL IP核,64位 标准FIPS 46-3 NIST,并且使用3组64位密钥-The VHDL implementation 3DES,The core complies with the Triple-DES 64-bit block
cipher defined in FIPS 46-3 NIST standard and operates
with three 64-bit keys.
Functional Descr
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Size: 138240 |
Author: XU |
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Description: Verilog DES Encrption Module
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Size: 36864 |
Author: jc |
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Description: 用VHDL描述DES算法 用硬件的方式DES加解密
体现了硬件编程人一般思想-DES algorithm using VHDL description of the way with hardware DES encryption and decryption hardware programming reflects the general thinking of people
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Size: 14336 |
Author: lichen |
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Description: DES VHDL FPGA CODING
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Size: 11315200 |
Author: 张彬 |
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Description: SIMULATION AND SYNTHESIS OF TRIPLE-DES BLOCK CIPHER USING VHDL
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Size: 11264 |
Author: saipraveen |
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Description: 采用vhdl实现DES算法,有详细的设计理论。为电子科技大学研究生论文。-VHDL realize the use of DES algorithm, a detailed design theory. For the University of Electronic Science and Technology Graduate thesis.
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Size: 2537472 |
Author: 邓秀华 |
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Description: 一种基于VHDL的DES加密实现方法,经过实际验证可以运行-A VHDL-based DES encryption method, you can run after the actual verification
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Size: 11264 |
Author: 邱世中 |
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Description: des examples sur nexys2
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Size: 98304 |
Author: yassinechebbi |
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Description: des加密算法在MATLAB中,通过VHDL语言的实现-des encryption algorithm in MATLAB, through the realization of VHDL language
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Size: 226304 |
Author: renjinjun |
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Description: VHDL Encryption/ Decryption Algorithm
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Size: 2383872 |
Author: WafaMahdhi |
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Description: des——top加密vhdl模块,顶层设计接口用于docsis3.0加密(Des - Top encryption VHDL module, top-level design interface for docsis3.0 encryption)
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Size: 1024 |
Author: pengtao1581
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